Phase locked oscillators are well known in the data communication field. They are particularly used for recovering the clock existing in a train of data received on a telecommunication line and also for determining the more appropriate instants when the received signal has to be sampled in order to recover the transmitted bits. FIG. 1A shows an illustrative example of an equalized bipolar analog signal 101 with a bit period 104 which is likely to be processed by the receiving part of a modem. The modem samples the received analog signal at different instants determined by a sampling clock. In the figure, two distinctive sets of sampling instants are illustrated: a first set 103a, 103b, 103c . . . which corresponds to a sampling clock which is not locked on the receive clock carried by the signal and, conversely, a second set 102a, 102b, 102c . . . which corresponds to a sampling clock that is actually locked on the receive clock and would assure the best efficiency for the data recovery process.
Moreover, sigma-delta technology is of great interest for realizing linear, accurate and simple analog-to-digital converters which can be used in Data Circuit Terminating Equipment (DCE) or modems. Sigma-delta coders and decoders generally require the use of decimation circuits requiring a great number of electronic components. For that reason, decimation circuits are embodied by means of Very Large Scale Technology (VLSI) components.
FIG. 1B shows the traditional basic structure of an analog-to-digital converter using a sigma-delta converter 130 for converting an analog input signal existing on lead 110 to a train of sigma-delta pulses on a lead 120. The train of sigma-delta pulses comprises a high level of out-of-band quantization noise which is then entered into a decimation circuit 170 in order to convert the sigma-delta pulses into a sequence of Pulse Code Modulation (PCM) samples on leads 140. For that purpose, decimation circuit 170 includes a low-pass digital filter 150 for suppressing the above out-of-band quantization noise and for avoiding in-band aliasing during the decimation process. Decimation circuit 170 also includes a specific decimation element 160 which samples down the output signal of low-pass filter 150. This is simply achieved by taking one sample over N samples. N is called the decimation factor of the decimation process.
FIG. 2 illustrates the different signal spectra which are involved in the sigma-delta conversion and decimation processes. FIG. 2A shows a spectrum of a typical band-limited analog input signal which is carried by lead 110. FIG. 2B shows the spectrum of the corresponding train of sigma-delta pulses existing on lead 120 that result from the sigma-delta conversion process. As mentioned above, the sigma-delta bit stream of FIG. 2B has a high level of out-of-band quantization noise which periodically extends over the whole band with a period fs which is equal to the value of the sigma-delta modulation frequency. The dotted lines in FIG. 2c illustrate the frequency response of low-pass filter 150 and the resulting filtered signal which has a spectrum which is shown in FIG. 2D. FIG. 2E illustrates the spectrum of the PCM signal which exists at the output of decimation circuit 170. The PCM words are generated at a frequency of fs/N.
Since sigma-delta technology is particularly well-suited for modems, a need has appeared for a simple and efficient decimation filter associated with a sigma-delta converter which allows phase control of the PCM sample generation.